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  0.1 f, 5 v powered cmos rs-232 drivers/receivers adm206/adm207/adm208/adm211/adm213 rev. d information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2011 analog devices, inc. all rights reserved. features 0.1 f to 10 f capacitors 120 kb/s data rate two receivers active in shutdown (adm213) on-board dc-to-dc converters 9 v output swing with 5 v supply low power (15 mw) low power shutdown 5 w 30 v receiver input levels latch-up free pin compatible to max206-211/213 applications computers peripherals modems printers instruments typical operating circuit 0.1 f 6.3v + + 0.1 f 5v input + 0.1 f 16v 0.1 f 16v + 0.1 f 16v + t1 t2 t3 t4 r1 r2 r3 r4 r5 gnd adm211 t1 in t2 in t3 in t4 in r1 out r2 out r3 out r4 out r5 out t1 out t2 out t3 out t4 out r1 in r2 in r3 in r4 in r5 in sd ttl/cmos inputs 1 ttl/cmos outputs rs-232 outputs rs-232 inputs 2 +5v to +10v vo lta g e doubler +10v to ?10v vo lta g e inverter notes 1 internal 400k pull-up resistor on each ttl/cmos input. 2 internal 5k pull-down resist or on each rs-232 input. c1+ c1? c2+ c2? v cc v+ v? 00067-0-001 en 12 14 15 16 11 13 17 2 3 1 28 9 4 27 23 18 25 7 6 20 21 8 5 26 22 19 24 10 figure 1. general description the adm2xx family of line drivers/receivers is intended for all eia-232-e and v.28 communications interfaces, especially in applications where 12 v is not available. the adm206, adm211, and adm213 feature a low power shutdown mode that reduces power dissipation to less than 5 w, making them ideally suited for battery-powered equipment. the adm213 has an active low shutdown and an active high receiver-enable control. two receivers of the adm213 remain active during shutdown. this feature is useful for ring indicator monitoring. all members of the adm2xx family include two internal charge pump voltage converters that allow operation from a single 5 v supply. these parts convert the 5 v input power to the 10 v required for rs-232 output levels. table 1. selection table part number power supply voltage number of rs- 232 drivers number of rs-232 receivers external capacitors low power shutdown (sd) ttl three- state en number of receivers active in shutdown adm206 5 v 4 3 4 yes yes 0 adm207 5 v 5 3 4 no no 0 adm208 5 v 4 4 4 no no 0 adm211 5 v 4 5 4 yes yes 0 adm213 5 v 4 5 4 yes ( sd ) yes (en) 2
adm206/adm207/adm208/adm211/adm213 rev. d | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 typical operating circuit ................................................................ 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 4 esd caution .................................................................................. 4 pin configurations and function descriptions ............................5 typical performance characteristics ..............................................9 general information ...................................................................... 11 circuit description .................................................................... 11 application hints ....................................................................... 12 outline dimensions ....................................................................... 13 ordering guide .......................................................................... 16 revision history 5/11data sheet changed from rev. c to rev. d deleted adm209 ................................................................ universal changes to figure 5 .......................................................................... 5 updated outline dimensions ....................................................... 13 changes to ordering guide .......................................................... 15 1/05data sheet changed from rev. b to rev. c changes to specifications ................................................................ 3 change to receivers section .......................................................... 11 change to driving long cables section ...................................... 12 updated outline dimensions ....................................................... 13 changes to ordering guide .......................................................... 15 6/02data sheet changed from rev. a to rev. b removed all references to adm205 ................................ universal 3/02data sheet changed from rev. 0 to rev. a changes to numbers in min/typ/max column of specifications page ........................................................................... 2 updated figures ............................................................................ 8, 9 revision 0: initial version
adm206/adm207/adm208/adm211/adm213 rev. d | page 3 of 16 specifications v cc = 5 v 10% (adm206, adm207, adm208, adm211, adm213); c1Cc4 = 0.1 f ceramic. all specifications t min to t max , unless otherwise noted. table 2. parameter min typ max unit test conditions/comments output voltage swing 5 9 v all transmit ter outputs loaded with 3 k to ground v cc power supply current 5 13 ma no load shutdown supply current 1 10 a input logic threshold low, v inl 0.8 v t in , en , sd, en, sd input logic threshold high, v inh 2.0 v t in , en , sd, en, sd logic pull-up current 10 25 a t in = 0 v rs-232 input voltage range 1 C30 +30 v rs-232 input threshold low 0.8 1.25 v rs-232 input threshold high 1.9 2.4 v rs-232 input hysteresis 0.65 v rs-232 input resistance 3 5 7 k t a = 0c to 85c ttl/cmos output voltage low, v ol 0.4 v i out = 1.6 ma ttl/cmos output voltage high, v oh 3.5 v i out = C1.0 ma ttl/cmos output leakage current 0.05 10 a en = v cc , en = 0 v, 0 v r out v cc output enable time (t en ) 115 ns adm206, adm211 ( figure 22 . c l = 150 pf) output disable time (t dis ) 165 ns adm206, adm211 ( figure 22 . r l = 1 k) propagation delay 0.5 5 s rs-232 to ttl transition region slew rate 8 v/s r l = 3 k, c l = 2500 pf; measured from +3 v to C3 v or C3 v to +3 v output resistance 300 v cc = v+ = vC = 0 v, v out = 2 v rs-232 output short circuit current 12 60 ma 1 guaranteed by design.
adm206/adm207/adm208/adm211/adm213 rev. d | page 4 of 16 absolute maximum ratings t a = 25c, unless otherwise noted. table 3. parameter min v cc C0.3 v to +6 v v+ (v cc C 0.3 v) to +14 v vC +0.3 v to C14 v input voltages t in C0.3 v to (v cc + 0.3 v) r in 30 v output voltages t out (v+, +0.3 v) to (vC, C0.3 v) r out C0.3 v to (v cc + 0.3 v) short-circuit duration t out continuous power dissipation n-24 pdip (derate 13.5 mw/c above 70c) 1000 mw r-24 soic (derate 12 mw/c above 70c) 850 mw r-28 soic (derate 12.5 mw/c above 70c) 900 mw rs-24 ssop (derate 12 mw/c above 70c) 850 mw rs-28 ssop (derate 10 mw/c above 70c) 900 mw thermal impedance, ja n-24 pdip 120c/w r-24 soic 85c/w r-28 soic 80c/w rs-24 ssop 115c/w rs-28 ssop 100c/w operating temperature range industrial (a version) C40c to +85c storage temperature range C65c to +150c lead temperature, soldering 300c vapor phase (60 s) 215c infrared (15 s) 220 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
adm206/adm207/adm208/adm211/adm213 rev. d | page 5 of 16 pin configuration 4 and fu nction descriptions top view (not to scale) 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 adm206 c1? v+ c1+ v cc gnd t3 out t1 out t2 out r1 in t1 in t2 in r1 out c2+ c2? v? r3 in r3 out t4 out r2 in r2 out sd t3 in t4 in 00067-0-002 en figure 2. adm206 pdip/soic/ssop pin configuration 0.1 f 6.3v + + 0.1 f 5v input + 0.1 f 16v 0.1 f 6.3v + 0.1 f 16v + t1 t2 t3 t4 r1 r2 r3 gnd adm206 t1 in t2 in t3 in t4 in r1 out r2 out r3 out t1 out t2 out t3 out t4 out r1 in r2 in r3 in sd ttl/cmos inputs 1 ttl/cmos outputs rs-232 outputs rs-232 inputs 2 +5v to +10v vo lta g e doubler +10v to ?10v vo lta g e inverter c1+ c1? c2+ c2? v cc v+ v? 00067-0-003 en notes 1 internal 400k pull-up resistor on each ttl/cmos input. 2 internal 5k pull-down resistor on each rs-232 input. 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 figure 3. adm206 typical operating circuit top view (not to scale) 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 adm207 c1? v+ c1+ v cc gnd t3 out t1 out t2 out r1 in t1 in t2 in r1 out c2+ c2? v? r3 in r3 out t4 out r2 in r2 out t5 in t3 in t4 in t5 out 00067-0-004 figure 4. adm207 pdip/soic/ssop pin configuration 0.1 f 6.3v + + 0.1 f 5v input + 0.1 f 16v 0.1 f 6.3v + 0.1 f 16v + t1 t2 t3 t4 r1 r2 r3 gnd adm207 t1 in t2 in t3 in t4 in r1 out r2 out r3 out t1 out t2 out t3 out t4 out r1 in r2 in r3 in ttl/cmos inputs 1 ttl/cmos outputs rs-232 outputs rs-232 inputs 2 +5v to +10v voltage doubler +10v to ?10v vo lta g e inverter notes 1 internal 400k pull-up resistor on each ttl/cmos input. 2 internal 5k pull-down resistor on each rs-232 input. c1+ c1? c2+ c2? v cc v+ v? t5 t5 in t5 out 00067-0-005 24 23 20 16 15 4 8 9 11 5 17 19 18 22 14 13 21 6 7 10 12 1 3 2 figure 5. adm207 typical operating circuit
adm206/adm207/adm208/adm211/adm213 rev. d | page 6 of 16 top view (not to scale) 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 adm208 c1? v+ c1+ v cc gnd t2 out t1 out r2 in r2 out r1 in r1 out t1 in c2+ c2? v? r4 in r4 out t3 out r3 in r3 out t4 in t2 in t3 in t4 out 00067-0-006 figure 6. adm208 pdip/soic/ssop pin configuration 0.1 f 6.3v + + 0.1 f 5v input + 0.1 f 16v 0.1 f 6.3v + 0.1 f 16v + t1 t2 t3 t4 r1 r2 r3 r4 gnd adm208 t1 in t2 in t3 in t4 in r1 out r2 out r3 out r4 out t1 out t2 out t3 out t4 out r1 in r2 in r3 in r4 in ttl/cmos inputs 1 ttl/cmos outputs rs-232 outputs rs-232 inputs 2 +5v to +10v vo lta g e doubler +10v to ?10v vo lta g e inverter c1+ c1? c2+ c2? v cc v+ v? 00067-0-007 notes 1 internal 400k pull-up resistor on each ttl/cmos input. 2 internal 5k pull-down resistor on each rs-232 input. 20 23 7 16 15 3 9 11 4 17 21 19 22 14 13 6 18 5 10 12 24 1 2 8 figure 7. adm208 typical operating circuit top view (not to scale) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 adm211 t3 out t1 out t4 out r3 in t2 out r2 in r3 out sd r2 out t2 in r4 in t1 in r1 out r4 out t4 in r1 in gnd t3 in r5 out v cc c1+ r5 in v? v+ c1? c2? c2+ 00067-0-010 en figure 8. adm211 soic/ssop pin configuration 0.1 f 6.3v + + 0.1 f 5v input + 0.1 f 16v 0.1 f 16v + 0.1 f 16v + t1 t2 t3 t4 r1 r2 r3 r4 r5 gnd adm211 t1 in t2 in t3 in t4 in r1 out r2 out r3 out r4 out r5 out t1 out t2 out t3 out t4 out r1 in r2 in r3 in r4 in r5 in sd ttl/cmos inputs 1 ttl/cmos outputs rs-232 outputs rs-232 inputs 2 +5v to +10v voltage doubler +10v to ?10v voltage inverter c1+ c1? c2+ c2? v cc v+ v? 00067-0-011 en notes 1 internal 400k pull-up resistor on each ttl/cmos input. 2 internal 5k pull-down resistor on each rs-232 input. 23 25 4 9 18 3 2 27 28 1 17 11 13 22 24 5 8 19 6 7 26 21 20 15 16 12 14 10 figure 9. adm211 typical operating circuit
adm206/adm207/adm208/adm211/adm213 rev. d | page 7 of 16 0.1 f 6.3v + + 0.1 f 5v input + 0.1 f 16v 0.1 f 16v + 0.1 f 16v + t1 t2 t3 t4 r1 r2 r3 r4 r5 gnd adm213 t1 in t2 in t3 in t4 in r1 out r2 out r3 out r4 out 3 r5 out 3 en t1 out t2 out t3 out t4 out r1 in r2 in r3 in r4 in 3 r5 in 3 ttl/cmos inputs 1 ttl/cmos outputs rs-232 outputs rs-232 inputs 2 +5v to +10v voltage doubler +10v to ?10v vo lta g e inverter c1+ c1? c2+ c2? v cc v+ v? 00067-0-013 sd notes 1 internal 400k pull-up resistor on each ttl/cmos input. 2 internal 5k pull-down resistor on each rs-232 input. 3 active in shutdown. 23 25 4 9 18 3 2 27 28 1 17 11 13 22 24 5 8 19 6 7 26 21 20 15 16 12 14 10 top view (not to scale) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 adm213 t3 out t1 out t4 out r3 in t2 out r2 in r3 out r2 out t2 in en r4 in * t1 in r1 out r4 out * t4 in r1 in gnd t3 in r5 out * v cc c1+ r5 in * v? v+ c1? c2? c2+ * active in shutdown 00067-0-012 sd figure 11. adm213 typical operating circuit figure 10. adm213 soic/ssop pin configuration
adm206/adm207/adm208/adm211/adm213 rev. d | page 8 of 16 table 4. pin function descriptions mnemonic function v cc power supply input. 5 v 10%. v+ internally generated positive supply (10 v nominal). vC internally generated negative supply (C10 v nominal). gnd ground pin. must be connected to 0 v. c1+ external capacitor (+ terminal) is connected to this pin. c1C external capacitor (C terminal) is connected to this pin. c2+ external capacitor (+ terminal) is connected to this pin. c2C external capacitor (C terminal) is connected to this pin. t in transmitter (driver) inputs. these inputs accept ttl/cm os levels. an internal 400 k pull-up resistor to v cc is connected to each input. t out transmitter (driver) outputs. these are rs-232 levels (typically 10 v). r in receiver inputs. these inputs accept rs-232 signal levels. an in ternal 5 k pull-down resistor to gnd is connected to each input. r out receiver outputs. these are ttl/cmos levels. en /en enable input. active low on adm206 and adm211. active high on adm213. this input is used to enable/disable the receiver outputs. with en = low (en = high adm213), the receiver outputs are enabled. with en = high (en = low adm213), the outputs are placed in a high impedance state. this is useful for connecting to microprocessor systems. sd/ sd shutdown input. active high on adm206 and adm211. active low on adm213. with sd = high on the adm206 and adm211, the charge pump is disabled, the receiver outputs are placed in a high impedance state, and th e driver outputs are turned off. with sd = low on the adm213, the charge pump is disabled, the driv er outputs are turned off, and all receivers, except r4 and r5, are placed in a high impedance state. in shutdown, the power consumption reduces to 5 w. nc no connect. no connections are required to this pin. table 5. adm206 and adm211 truth table sd en status transmitters t1Ct5 receivers r1Cr5 0 0 normal operation enabled enabled 0 1 normal operation enabled disabled 1 0 shutdown disabled disabled table 6. adm213 truth table sd en status transmitters t1Ct4 receivers r1Cr3 receivers r4, r5 0 0 shutdown disabled disabled disabled 0 1 shutdown disabled disabled enabled 1 0 normal operation enabled disabled disabled 1 1 normal operation enabled enabled enabled
adm206/adm207/adm208/adm211/adm213 rev. d | page 9 of 16 typical performance characteristics load current (ma) ? 15 51 0 v+/v? (v) v+ 15 v ? 20 0 ? 10 ? 5 0 5 10 15 00067-0-014 figure 12. charge pump v+, vC vs. load current load capacitance (pf) 0 0 500 slew rate (v/ s) 5 negative slew 50 1000 10 15 20 25 30 35 40 45 positive slew 1500 2000 2500 3000 00067-0-015 figure 13. transmitter slew rate vs. load capacitance v cc (v) ?9 4.0 4.5 tx o/p (v) 5.0 5.5 6.0 ?7 ?5 ?3 ?1 1 3 5 7 9 tx o/p high loaded tx o/p low loaded 0 00067-0-016 figure 14. transmitter output voltage vs. v cc load current (ma) ?15 02 tx o/p (v) tx o/p high 468 ?10 ?5 0 5 10 15 tx o/p low 10 00067-0-017 figure 15. transmitter output voltage vs. load current v cc (v) 0 4.5 4.7 impedance ( ) 200 100 50 v+ imp v? imp 150 250 300 350 4.9 5.1 5.3 5.5 00067-0-018 figure 16. charge pump impedance vs. v cc ch1 ch3 5.00v 5.00v b w ch2 5.00v m50.0 s ch1 3.1v v+, v? exiting shutdown (sd) t t t sd v+ v? 00067-0-019 2 1 3 figure 17. charge pump, v+, vC exiting shutdown
adm206/adm207/adm208/adm211/adm213 rev. d | page 10 of 16 ch1 5.00v ch2 5.00v m1.00 s ch1 800mv t t tx output tx input 00067-0-020 2 1 figure 18. transmitter output loaded slew rate ch1 5.00v ch2 5.00v m1.00 s ch1 800mv t t tx output tx input 00067-0-021 2 1 figure 19. transmitter output unloaded slew rate
adm206/adm207/adm208/adm211/adm213 rev. d | page 11 of 16 general information the adm2xx family of rs-232 drivers/ receivers is designed to solve interface problems by meeting the eia-232-e specifications while using a single digital 5 v supply. the eia- 232-e standard requires transmitters that will deliver 5 v minimum on the transmission channel and receivers that can accept signal levels down to 3 v. the adm2xx meet these requirements by integrating step-up voltage converters and level shifting transmitters and receivers onto the same chip. cmos technology is used to keep the power dissipation to an absolute minimum. a comprehensive range of transmitter/ receiver combinations is available to cover most communication needs. the adm2xx are modifications, enhancements, and improvements to the ad2xx family and derivatives thereof. they are essentially plug-in compatible and do not have materially different applications. the adm206, adm211, and adm213 are particularly useful in battery-powered systems because they feature a low power shut- down mode that reduces power dissipation to less than 5 w. to facilitate sharing a common line or for connection to a microprocessor data bus, the adm206, the adm211, and the adm213 feature an enable ( en ) function. when the receivers are disabled, their outputs are placed in a high impedance state. circuit description the internal circuitry in the adm2xx consists of three main sections: (a) a charge pump voltage converter; (b) rs-232-to- ttl/cmos receivers; and (c) ttl/cmos-to-rs-232 transmitters. charge pump dc-to-dc voltage converter the charge pump voltage converter consists of an oscillator and a switching matrix. the converter generates a 10 v supply from the 5 v input. this is done in two stages using a switched capacitor technique, as illustrated in figure 20 and figure 21 . first, the 5 v input supply is doubled to 10 v using capacitor c1 as the charge storage element. the 10 v level is then inverted to generate C10 v using c2 as the storage element. + + v cc gnd s1 s2 c1 s3 s4 c3 v cc v+ = 2v cc internal oscillator 00067-0-022 figure 20. charge pump voltage doubler + + v+ gnd s1 s2 c2 s3 s4 c4 gnd v? = ?(v+) internal oscillator from vo lta g e doubler 00067-0-023 figure 21. charge pump voltage inverter capacitors c3 and c4 are used to reduce the output ripple. their values are not critical and can be reduced if higher levels of ripple are acceptable. the charge pump capacitors c1 and c2 may also be reduced at the expense of higher output impedance on the v+ and vC supplies. the v+ and vC supplies may also be used to power external circuitry if the current requirements are small. transmitters (drivers) the drivers convert ttl/cmos input levels into eia-232-e output levels. with v cc = +5 v and driving a typical eia-232-e load, the output voltage swing is 9 v. even under worst-case conditions, the drivers are guaranteed to meet the 5 v eia- 232-e minimum requirement. the input threshold levels are both ttl- and cmos-compatible with the switching threshold set at v cc /4. with a nominal v cc = 5 v, the switching threshold is 1.25 v typical. unused inputs may be left unconnected, because an internal 400 k pull-up resistor pulls them high, forcing the outputs into a low state. as required by the eia-232-e standard, the slew rate is limited to less than 30 v/s, without the need for an external slew limiting capacitor, and the output impedance in the power-off state is greater than 300 . receivers the receivers are inverting level shifters that accept eia-232-e input levels (5 v to 15 v) and translate them into 5 v ttl/ cmos levels. the inputs have internal 5 k pull-down resistors to ground and are also protected against overvoltages of up to 30 v. the guaranteed switching thresholds are 0.8 v minimum and 2.4 v maximum, well within the 3 v eia-232-e require- ment. the low level threshold is deliberately positive, since it ensures that an unconnected input will be interpreted as a low level. the receivers have schmitt-trigger inputs with a hysteresis level of 0.65 v. this ensures error-free reception for both noisy inputs and inputs with slow transition times.
adm206/adm207/adm208/adm211/adm213 rev. d | page 12 of 16 shutdown (sd) the adm2xx feature a control input that may be used to disable the part and reduce the power consump-ion to less than 5 w. this is very useful in battery-operated systems. during shutdown, the charge pump is turned off, the transmitters are disabled, and all receivers except r4 and r5 on the adm213 are put into a high impedance disabled state. receivers r4 and r5 on the adm213 remain enabled during shutdown. this feature allows monitoring external activity while the device is in a low power shutdown mode. the shutdown control input is active high on all parts except the adm213, where it is active low. see table 5 and table 6 . enable input the adm211 and adm213 feature an enable input used to enable or disable the receiver outputs. the enable input is active low on the adm211 and active high on the adm213. see table 5 and table 6 . when the receivers are disabled, their outputs are placed in a high impedance state. this function allows the outputs to be connected directly to a microprocessor data bus. it can also be used to allow receivers from different devices to share a common data line. the timing diagram for the enable function is shown in figure 22 . 3v 0v r out t en t dis v oh ? 0.1v v ol + 0.1v 3.5v 0.8v * polarity of en is reversed for adm213. 00067-0-024 en* figure 22. enable timing application hints driving long cables in accordance with the eia-232-e standard, long cables are permissible provided the total load capacitance does not exceed 2500 pf. for longer cables that do exceed this, it is possible to trade off baud rate for cable length. large load capacitances cause a reduction in slew rate, and therefore the maximum transmis- sion baud rate is decreased. the adm2xx are designed to minimize the slew rate reduction that occurs as load capacitance increases. for the receivers, it is important that a high level of noise immunity be inbuilt so that slow rise and fall times do not cause multiple output transitions as the signal passes slowly through the transition region. the adm2xx have 0.65 v of hysteresis to guard against this. this ensures that even in noisy environments error-free reception can be achieved. high baud rate operation the adm2xx feature high slew rates, permitting data transmission at rates well in excess of the eia-232-e specification. the drivers maintain 5 v signal levels at data rates up to 120 kb/s under worst-case loading conditions.
adm206/adm207/adm208/adm211/adm213 rev. d | page 13 of 16 outline dimensions 24 11 2 13 1.185 (30.01) 1.165 (29.59) 1.145 (29.08) 0.295 (7.49) 0.285 (7.24) 0.275 (6.99) 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) seating plane 0.015 (0.38) min 0.180 (4.57) max 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0 .150 (3.81) 0 .130 (3.30) 0 .110 (2.79) 0.100 (2.54) bsc 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design compliant to jedec standards mo-095ag figure 23. 24-lead plastic dual in-line package [pdip] narrow body (n-24-1) dimensions shown in inches and (millimeters) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-013ad 8 0 0.75 (0.0295) 0.25 (0.0098) 45 1.27 (0.0500) 0.40 (0.0157) 0.33 (0.0130) 0.20 (0.0079) seating plane 0.30 (0.0118) 0.10 (0.0039) 0.51 (0.020) 0.31 (0.012) 2.65 (0.1043) 2.35 (0.0925) 1.27 (0.0500) bsc 24 13 12 1 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 15.60 (0.6142) 15.20 (0.5984) coplanarit y 0.10 figure 24. 24-lead standard small outline package [soic_w] wide body (rw-24) dimensions shown in millimeters and (inches)
adm206/adm207/adm208/adm211/adm213 rev. d | page 14 of 16 24 13 12 1 8.20 7.80 7.40 5.60 5.30 5.00 0.38 0.22 seating plane 0.05 min 0.65 bsc 2.00 max 1.85 1.75 1.65 0.95 0.75 0.55 0.25 0.09 8 4 0 coplanarity 0.10 8.50 8.20 7.90 pin 1 compliant to jedec standards mo-150ag figure 25. 24-lead shrink small outline package [ssop] (rs-24) dimensions shown in millimeters controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-013ae 0.33 (0.0130) 0.20 (0.0079) 8 0 0.75 (0.0295) 0.25 (0.0098) 45 1.27 (0.0500) 0.40 (0.0157) seating plane 0.30 (0.0118) 0.10 (0.0039) 0.51 (0.0201) 0.33 (0.0130) 2.65 (0.1043) 2.35 (0.0925) 1.27 (0.0500) bsc 28 15 14 1 18.10 (0.7126) 17.70 (0.6969) 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) coplanarity 0.10 figure 26. 28-lead standard small outline package [soic_w] wide body (rw-28) dimensions shown in millimeters and (inches)
adm206/adm207/adm208/adm211/adm213 rev. d | page 15 of 16 0.25 0.09 0.95 0.75 0.55 8 4 0 0.05 min 1.85 1.75 1.65 2.00 max 0.38 0.22 seating plane 0.65 bsc coplanarity 0.10 28 15 14 1 10.50 10.20 9.90 5.60 5.30 5.00 8.20 7.80 7.40 pin 1 compliant to jedec standards mo-150ah figure 27. 28-lead shrink small outline package [ssop] (rs-28) dimensions shown in millimeters
adm206/adm207/adm208/adm211/adm213 rev. d | page 16 of 16 ordering guide model 1 temperature range package description package option adm206an C40c to +85c 24-lead pdip n-24-1 adm206anz C40c to +85c 24-lead pdip n-24-1 adm206ar C40c to +85c 24-lead soic_w rw-24 adm206ar-reel C40c to +85c 24-lead soic_w rw-24 adm206arz C40c to +85c 24-lead soic_w rw-24 adm206arz-reel C40c to +85c 24-lead soic_w rw-24 adm206ars C40c to +85c 24-lead ssop rs-24 adm206arsz C40c to +85c 24-lead ssop rs-24 adm206arsz-reel C40c to +85c 24-lead ssop rs-24 adm207an C40c to +85c 24-lead pdip n-24-1 adm207anz C40c to +85c 24-lead pdip n-24-1 adm207ar C40c to +85c 24-lead soic_w rw-24 adm207arz C40c to +85c 24-lead soic_w rw-24 adm207arz-reel C40c to +85c 24-lead soic_w rw-24 adm207ars C40c to +85c 24-lead ssop rs-24 adm207arsz C40c to +85c 24-lead ssop rs-24 adm207arsz-reel C40c to +85c 24-lead ssop rs-24 adm208an C40c to +85c 24-lead pdip n-24-1 adm208anz C40c to +85c 24-lead pdip n-24-1 adm208ar C40c to +85c 24-lead soic_w rw-24 adm208ar-reel C40c to +85c 24-lead soic_w rw-24 adm208arz C40c to +85c 24-lead soic_w rw-24 adm208arz-reel C40c to +85c 24-lead soic_w rw-24 adm208arsz C40c to +85c 24-lead ssop rs-24 adm208arsz-reel C40c to +85c 24-lead ssop rs-24 adm211ar C40c to +85c 28-lead soic_w rw-28 adm211ar-reel C40c to +85c 28-lead soic_w rw-28 adm211arz C40c to +85c 28-lead soic_w rw-28 adm211arz-reel C40c to +85c 28-lead soic_w rw-28 adm211ars C40c to +85c 28-lead ssop rs-28 ADM211ARS-REEL C40c to +85c 28-lead ssop rs-28 adm211arsz C40c to +85c 28-lead ssop rs-28 adm211arsz-reel C40c to +85c 28-lead ssop rs-28 adm213ar C40c to +85c 28-lead soic_w rw-28 adm213arz C40c to +85c 28-lead soic_w rw-28 adm213arz-reel C40c to +85c 28-lead soic_w rw-28 adm213ars C40c to +85c 28-lead ssop rs-28 adm213ars-reel C40c to +85c 28-lead ssop rs-28 adm213arsz C40c to +85c 28-lead ssop rs-28 adm213arsz-reel C40c to +85c 28-lead ssop rs-28 1 z = rohs compliant part. ?2011 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d00067-0-5/11(d)


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